Generally, a MOS driver circuit drives a large current of hundreds of mA to an output terminal in response to an input signal. Accordingly, due to large driving current consumption, a push-pull output stage is conventionally included in a MOS driver circuit to reduce the power consumption. In the push-pull output stage, a pull-up NMOS transistor and a pull-down NMOS transistor are connected between a supply voltage Vcc and the ground voltage Vss, and the node connected commonly to the source of the pull-up NMOS transistor and the drain of the pull-down NMOS transistor is connected to an output terminal. In such a push-pull output stage of the NMOS transistors, the output voltage does not reach a full Vcc of potential difference when a "high" output is driven due to a voltage drop by the pull-up nmos transistor; rather the potential difference is Vcc-Vt because of the drop by a threshold voltage Vt. Thus, it is disadvantageous in that the operating speed is dropped when the capacitance load is driven.
To solve the above problem, there has been reported a driver circuit adopting a boost circuit which supplies Vcc potential difference to the output terminal by driving the pull-up NMOS transistor with a voltage boosted above Vcc. In general, a driver circuit adopting a boost circuit comprises a bootstrap capacitor, which is precharged, so as to drive the pull-up NMOS transistor with a potential of Vcc+.alpha. obtained by adding the precharging voltage .alpha. of the capacitor to the supply voltage Vcc. Accordingly, the pull-up NMOS transistor is completely turned on and a full Vcc potential difference is supplied to the output terminal.
However, the driver circuit as described above depends on the supply voltage Vcc. Accordingly, if the supply voltage Vcc varies, the output voltage also varies as much as the variation of the supply voltage. In particular, at a voltage higher than the normal supply voltage, for instance, at a high voltage Vcc of above 6 V with the normal supply voltage of 5 V, the parasitic reactance and the capacitance existing at output terminal results in noises on the ground line and the power line.
Under the circumstances, a technique is reported, in which at a high Vcc, the current supplied to the pull-up NMOS transistor is by-passed to the supply voltage line via the clamping circuit, so as to clamp the boosted voltage to Vcc+.beta. ( here, .beta. is a clamping voltage).